SH7760 Datasheet, PDF (420/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Ch. Register Name
Abbrev.
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
Manual Reset
Standby
by RESET Sleep
by
Pin/WDT/
by Sleep
Software/
Multiple
Instruction/ by
Each
Exception Deep Sleep Hardware Module
DMABRG DMA audio control register 1
DMAACR1 H’0000 0000 H’0000 0000 Retained
* Retained
DMA audio transmit transfer
counter 1
DMAATX Undefined
TCNT1
Undefined
Retained
Retained
DMA audio receive transfer
counter 1
DMAARX Undefined
TCNT1
Undefined
Retained
Retained
DAM USB source address register DMAUSAR H’0000 0000 H’0000 0000 Retained
Retained
DMA USB destination register
DMAUDAR H’0000 0000 H’0000 0000 Retained
Retained
DMA USB R/W size register
DMAURWSZ H’0000 0000 H’0000 0000 Retained
Retained
DMA USB control register
DMAUCR H’0000 0000 H’0000 0000 Retained
Retained
Note: * After exiting hardware standby mode, this LSI enters the power-on reset state by the
RESET pin.
Rev. 1.0, 02/03, page 370 of 1294