SH7760 Datasheet, PDF (117/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Table 4.7 Branch Instructions
Instruction
BF
label
BF/S
label
BT
label
BT/S
label
BRA
BRAF
BSR
BSRF
JMP
JSR
RTS
label
Rn
label
Rn
@Rn
@Rn
Operation
Instruction Code
Privileged T Bit
When T = 0, disp × 2 + PC + 10001011dddddddd —
—
4 → PC
When T = 1, nop
Delayed branch; when T = 0, 10001111dddddddd —
—
disp × 2 + PC + 4 → PC
When T = 1, nop
When T = 1, disp × 2 + PC + 10001001dddddddd —
—
4 → PC
When T = 0, nop
Delayed branch; when T = 1, 10001101dddddddd —
—
disp × 2 + PC + 4 → PC
When T = 0, nop
Delayed branch, disp × 2 +
1010dddddddddddd —
—
PC + 4 → PC
Delayed branch, Rn + PC + 4 → 0000nnnn00100011 —
—
PC
Delayed branch, PC + 4 → PR, 1011dddddddddddd —
—
disp × 2 + PC + 4 → PC
Delayed branch, PC + 4 → PR, 0000nnnn00000011 —
—
Rn + PC + 4 → PC
Delayed branch, Rn → PC
0100nnnn00101011 —
—
Delayed branch, PC + 4 → PR, 0100nnnn00001011 —
—
Rn → PC
Delayed branch, PR → PC
0000000000001011 —
—
Rev. 1.0, 02/03, page 67 of 1294