SH7760 Datasheet, PDF (332/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Table 10.10 16-Bit Off-chip Device/Big-Endian Access and Data Alignment
Operation
Access
D31 to
Size Address No. D24
Byte 2n
1—
2n+1 1 —
Word 2n
1—
Long-
word
4n
4n+2
1—
2—
Quad- 8n
word
8n+2
1—
2—
8n+4 3 —
8n+6 4 —
Data Bus
D23 to
D16
D15 to D8D7 to D0 WE3,
DQM3
—
Data —
7 to 0
—
—
Data
7 to 0
—
Data Data
15 to 8 7 to 0
—
Data Data
31 to 24 23 to 16
—
Data Data
15 to 8 7 to 0
—
Data Data
63 to 56 55 to 48
—
Data Data
47 to 40 39 to 32
—
Data Data
31 to 24 23 to 16
—
Data Data
15 to 8 7 to 0
Strobe Signals
WE2, WE1, WE0,
DQM2 DQM1 DQM0
Asserted
Asserted
Asserted Asserted
Asserted Asserted
Asserted Asserted
Asserted Asserted
Asserted Asserted
Asserted Asserted
Asserted Asserted
Rev. 1.0, 02/03, page 282 of 1294