SH7760 Datasheet, PDF (767/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

21.2 Input/Output Pins
Table 21.1 shows the pin configuration of the USB host module.
Table 21.1 Pin Configuration
Pin Name
D+
D−
Power enable
Overcurrent
UCLK
Abbreviation
USB_DP
USB_DM
USB_PENC
USB_OVC
UCLK
I/O
Function
Input/Output Root hub port D+ transceiver pin
Input/Output Root hub port D− transceiver pin
Output
Power-on enable control pin for root hub port
Input
Overcurrent detection pin for root hub port
Input
USB operating clock (input clock of 48.0000
MHz ± 0.05%)
21.3 Register Descriptions
The USB host module has the following registers. These registers can be accessed only in
longwords. Access in bytes or words is prohibited. For details on register addresses and register
states during each process, see section 32, List of Registers. When a clock is not input from the
UCLK pin, these registers cannot be accessed.
Rev. 1.0, 02/03, page 717 of 1294