SH7760 Datasheet, PDF (444/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name
18
A0RXEF
17
A0TXHF
16
A0TXEF
15 to 10 
9
UAE
8
UTE
7 to 2 
1
UAF
Initial Value R/W
0
R/W
0
R/W
0
R/W
All 0
R
0
R/W
0
R/W
All 0
R
0
R/W
Description
HAC(0)/SSI(0) Receive Side All Data Transfer End
Interrupt Flag
0: An interrupt has not occurred.
[Clearing condition]
When 0 is written to A0RXEF after reading
A0RXEF = 1
1: An interrupt has occurred.
HAC(0)/SSI(0) Transmit Side Half Data Transfer
End Interrupt Flag
0: An interrupt has not occurred.
[Clearing condition]
When 0 is written to A0TXHF after reading
A0TXHF = 1
1: An interrupt has occurred.
HAC(0)/SSI(0) Transmit Side All Data Transfer
End Interrupt Flag
0: An interrupt has not occurred.
[Clearing condition]
When 0 is written to A0TXEF after reading
A0TXEF = 1
1: An interrupt has occurred.
Reserved
These bits are always read as 0. The write value
should always be 0.
USB Address Error Interrupt Enable
0: Disabled
1: Enabled
USB Transfer End Interrupt Enable
0: Disabled
1: Enabled
Reserved
These bits are always read as 0. The write value
should always be 0.
USB Address Error Interrupt Flag
0: An interrupt has not occurred.
[Clearing condition]
When 0 is written to UAF after reading UAF = 1
1: An interrupt has occurred.
Rev. 1.0, 02/03, page 394 of 1294