SH7760 Datasheet, PDF (1183/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

32.2 Register Bits
Register addresses and bit names of the on-chip peripheral modules are described below.
Each line covers eight bits, and 16-bit and 32-bit registers are shown as 2 or 4 lines,
respectively.
Abbrev.
PTEH
PTEL
TTB
TEA
MMUCR
PTEA
Bit 31/ Bit 30/ Bit 29/ Bit 28/ Bit 27/ Bit 26/ Bit 25/ Bit 24/
23/15/7 22/14/6 21/13/5 20/12/4 19/11/3 18/10/2 17/9/ 1 16/8/0
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN
VPN


ASID
ASID
ASID
ASID
ASID
ASID
ASID
ASID



PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN
PPN

V
SZ1
PR1
PR0
SZ0
C
D
SH
WT
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
Virtual address at which MMU exception or address error occurred
Virtual address at which MMU exception or address error occurred
Virtual address at which MMU exception or address error occurred
Virtual address at which MMU exception or address error occurred
LRUI
LRUI
LRUI
LRUI
LRUI
LRUI


URB
LRB
LRB
LRB
LRB
LRB


URC
URC
URC
URC
URC
URC
SQMD SV





TI

AT




























TC
SA2
SA1
SA0
Module
MMU
Rev. 1.0, 02/03, page 1133 of 1294