SH7760 Datasheet, PDF (1104/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

30.3.13 LCDC Vertical Total Line Number Register (LDVTLNR)
LDVTLNR specifies the LCD panel module's entire vertical length, including that of the vertical
retrace period.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
- ^{VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN VTLN}
10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
1
1
1
0
1
1
1
1
1
R/W: R
R
R
R
R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 11 
10
VTLN10
9
VTLN9
8
VTLN8
7
VTLN7
6
VTLN6
5
VTLN5
4
VTLN4
3
VTLN3
2
VTLN2
1
VTLN1
0
VTLN0
Initial Value R/W
All 0
R
0
R/W
0
R/W
1
R/W
1
R/W
1
R/W
0
R/W
1
R/W
1
R/W
1
R/W
1
R/W
1
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Vertical Total Line Number
Sets the total number of vertical display lines (unit:
line).
Specify a value of (total number of lines) −1.
The minimum for the total number of vertical lines is
2 lines. The following conditions must be satisfied:
VTLN>=VDLN, VTLN>=1.
Example: For a 480-line LCD module and a vertical
retrace period of 0 lines.
VTLN = (480+0) –1 = 479 = H’1DF
Rev. 1.0, 02/03, page 1054 of 1294