SH7760 Datasheet, PDF (896/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Register Name
Abbrev.
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
Manual Reset
Standby
by RESET Sleep
by
Pin/WDT/ by Sleep
Software/
Multiple
Instruction/ by
Each
Exception Deep Sleep Hardware Module
Port A control register
PACR
H’0000 Retained
Retained
* Retained
Port B control register
PBCR
H’0000 Retained
Retained
Retained
Port C control register
PCCR H’FFFF Retained
Retained
Retained
Port D control register
PDCR H’FFFF Retained
Retained
Retained
Port E control register
PECR
H’0000 Retained
Retained
Retained
Port F control register
PFCR
H’0000 Retained
Retained
Retained
Port G control register
PGCR H’0000 Retained
Retained
Retained
Port H control register
PHCR H’003C Retained
Retained
Retained
Port J control register
PJCR
H’0000 Retained
Retained
Retained
Port K control register
PKCR
H’0000 Retained
Retained
Retained
Port A data register
PADR H’00
Retained
Retained
Retained
Port B data register
PBDR H’00
Retained
Retained
Retained
Port C data register
PCDR H’00
Retained
Retained
Retained
Port D data register
PDDR H’00
Retained
Retained
Retained
Port E data register
PEDR H’00
Retained
Retained
Retained
Port F data register
PFDR H’00
Retained
Retained
Retained
Port G data register
PGDR H’00
Retained
Retained
Retained
Port H data register
PHDR H’00
Retained
Retained
Retained
Port J data register
PJDR
H’00
Retained
Retained
Retained
Port K data register
PKDR H’00
Retained
Retained
Retained
GPIO interrupt control register
GPIOIC H’0000 Retained
Retained
Retained
Notes: * After exiting hardware standby mode, this LSI enters the power-on reset state caused by
the RESET pin.
Rev. 1.0, 02/03, page 846 of 1294