SH7760 Datasheet, PDF (1049/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Table 28.3 (3) SDBSR Configuration
Bit Abbreviation
I/O*
Bit Abbreviation
I/O*
370 MFI-D5/LCD_DATA5/DRAK2/DACK2 IN
340 MFI-CS/LCD_DON
IN
369 MFI-D5/LCD_DATA5/DRAK2/DACK2 OUT
339 MFI-CS/LCD_DON
OUT
368 MFI-D5/LCD_DATA5/DRAK2/DACK2 Control 338 MFI-CS/LCD_DON
Control
367 CS4
IN
337 MFI-E/LCD_CL1
IN
366 CS4
OUT
336 MFI-E/LCD_CL1
OUT
365 CS4
Control 335 MFI-E/LCD_CL1
Control
364 A20
IN
334 MFI-MD/LCD_CL2
IN
363 A20
OUT
333 MFI-MD/LCD_CL2
OUT
362 A20
Control 332 MFI-MD/LCD_CL2
Control
361 MFI-D14/LCD_DATA14
IN
331 CS6
IN
360 MFI-D14/LCD_DATA14
OUT
330 CS6
OUT
359 MFI-D14/LCD_DATA14
Control 329 CS6
Control
358 MFI-D6/LCD_DATA6/DREQ3
IN
328 A0
IN
357 MFI-D6/LCD_DATA6/DREQ3
OUT
327 A0
OUT
356 MFI-D6/LCD_DATA6/DREQ3
Control 326 A0
Control
355 MFI-D15/LCD_DATA15
IN
325 MFI-RS/LCD_M_DISP
IN
354 MFI-D15/LCD_DATA15
OUT
324 MFI-RS/LCD_M_DISP
OUT
353 MFI-D15/LCD_DATA15
Control 323 MFI-RS/LCD_M_DISP
Control
352 MFI-D7/LCD_DATA7/DRAK3/DACK3 IN
322 MFI-RW/LCD_FLM
IN
351 MFI-D7/LCD_DATA7/DRAK3/DACK3 OUT
321 MFI-RW/LCD_FLM
OUT
350 MFI-D7/LCD_DATA7/DRAK3/DACK3 Control 320 MFI-RW/LCD_FLM
Control
349 CS5
IN
319 BS
IN
348 CS5
OUT
318 BS
OUT
347 CS5
Control 317 BS
Control
346 A21
IN
316 A1
IN
345 A21
OUT
315 A1
OUT
344 A21
Control 314 A1
Control
343 MFI-INT/LCD_CLK
IN
313 D0
IN
342 MFI-INT/LCD_CLK
OUT
312 D0
OUT
341 MFI-INT/LCD_CLK
Control 311 D0
Control
Note: * Control is an active-high signal. When Control is driven high, the corresponding pin is driven
according to the OUT value.
Rev. 1.0, 02/03, page 999 of 1294