SH7760 Datasheet, PDF (796/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
16
15
14 to 2
1
0
Bit Name Initial Value
LPSC
0
DRWE 0

All 0
OCI
0
LPS
0
R/W Description
W Set Global Power
In global power mode (PSM = 0), writing 1 to this bit
will power all ports on (and clear the PPS bit to 0). In
per-port power mode, it will set the PPS bit to 1 only
on ports whose PPCM bit is not set. Writing 0 has
no effect.
0: Operation is not affected
1: Power of all ports is turned on
W Set Remote Wakeup Enable
Writing 1 to this bit sets the DRWE bit to 1. Writing 0
has no effect.
0: Operation is not affected
1: Device remote wakeup is enabled
R
Reserved
Always write 0 to this bit.
R
Reserved
Always write 0 to this bit.
W Clear Global Power
In global power mode (PSM = 0), writing 1 to this bit
will power all ports off (and clear the PPS bit to 0). In
per-port power mode, it will clear the PPS bit to 0
only on ports whose PPCM bit is not set. Writing 0
has no effect.
0: Operation is not affected
1: Power of all ports is turned off
21.3.22 Root Hub Port Status 1 Register (HcRhPortStatus1)
HcRhPortStatus1 is used for controlling and reporting the port event for each port. The upper word
indicates the change of the port status and the lower word indicates the port status.
Some status bits are implemented with special write behavior (see below). If a transaction (token
through handshake) is in progress when a write to change port status occurs, the resulting port
status change must be postponed until the transaction completes. Reserved bits should always be
written 0.
Since this register functions differently in read than in write, functional descriptions will be made
separately below. Note that bit titles in read are different from those in write so that the bit titles
can always suit the functions. For the bit name, the bit title for a read operation is used. Taking a
Rev. 1.0, 02/03, page 746 of 1294