SH7760 Datasheet, PDF (440/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name Initial Value R/W Description
15
—
0
R
Reserved
This bit is always read as 0. The write value
should always be 0.
14
DS3
0
R/W DREQ3 Select
0: Low-level detection
1: Falling-edge detection
13
RL3
0
R/W Request Check Level 3
0: DRAK3 high-active
1: DRAK3 low-active
12
AL3
0
R/W Acknowledge Level 3
0: DACK3 high-active
1: DACK3 low-active
11
—
0
R
Reserved
This bit is always read as 0. The write value
should always be 0.
10
DS2
0
R/W DREQ2 Select
0: Low-level detection
1: Falling-edge detection
9
RL2
0
R/W Request Check Level 2
0: DRAK2 high-active
1: DRAK2 low-active
8
AL2
0
R/W Acknowledge Level 2
0: DACK2 high-active
1: DACK2 low-active
7
—
0
R
Reserved
This bit is always read as 0. The write value
should always be 0.
6
DS1
0
R/W DREQ1 Select
0: Low-level detection
1: Falling-edge detection
5
RL1
0
R/W Request Check Level 1
0: DRAK1 high-active
1: DRAK1 low-active
Rev. 1.0, 02/03, page 390 of 1294