SH7760 Datasheet, PDF (985/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

• INTSTR1
Bit: 7
-
Initial value: 0
R/W: R
6
5
-
-
0
0
RR
4
3
2
1
0
-
-
CRC
ERI
DTERI CTERI
0
0
0
0
0
R R R/W R/W R/W
Bit
7 to 3
Bit
Name
—
Initial
Value R/W
All 0 R
2
CRCERI 0
R/W
1
DTERI 0
R/W
0
CTERI 0
R/W
Description
Reserved
These bits are always read as 0. The write
value should always be 0.
CRC Error Interrupt
0: No interrupt
[Clearing condition]
Write 0 after reading CRCERI = 1.
1: Interrupt requested
[Setting condition]
When a CRC error for command response
or receive data or a CRC status error for
transmit data response is detected while
CRCERIE = 1.
For the command response, CRC is
checked when the RTY4 in RSPTYR is
enabled.
Data Timeout Error Interrupt
0: No interrupt
[Clearing condition]
Write 0 after reading DTERI = 1.
1: Interrupt requested
[Setting condition]
When a data timeout error specified in
DTOUTR occurs while DTERIE = 1.
Command Timeout Error Interrupt
0: No interrupt
[Clearing condition]
Write 0 after reading CTERI = 1.
1: Interrupt requested
[Setting condition]
When a command timeout error specified
in TOCR occurs while CTERIE = 1.
Interrupt
outputs
—
MMCI2
MMCI2
MMCI2
Rev. 1.0, 02/03, page 935 of 1294