SH7760 Datasheet, PDF (42/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Figure 33.67 Differential Input Sensitivity (VDI), Differential common mode range
(VCM) .................................................................................................................1252
Figure 33.68 Load Condition of AC Characteristics (Full speed) ............................................1253
Figure 33.69 Load Condition of AC Characteristics (Low speed) ...........................................1254
Figure 33.70 t_r, t_f.......................................................................................................................1254
Figure 33.71 V_CRS .....................................................................................................................1254
Figure 33.72 AC Characteristics of 68 Series Bus....................................................................1255
Figure 33.73 AC Characteristics of 80 Series Bus (Read)........................................................1256
Figure 33.74 AC Characteristics of 80 Series Bus (Write) .......................................................1257
Figure 33.75 SIM Module Signal Timing.................................................................................1258
Figure 33.76 MMCIF Transmit Timing....................................................................................1259
Figure 33.77 MMCIF Receive Timing (rising edge sampling) ................................................1259
Figure 33.78 MMCIF Receive Timing (falling edge sampling) ...............................................1259
Figure 33.79 LCDC Module Signal Timing .............................................................................1260
Figure 33.80 HAC Cold Reset Timing .....................................................................................1261
Figure 33.81 HAC Cold Reset Timing .....................................................................................1261
Figure 33.82 HAC Clock Input Timing ....................................................................................1261
Figure 33.83 HAC Interface Module Signal Timing ................................................................1262
Figure 33.84 SSI Clock Input/Output Timing ..........................................................................1262
Figure 33.85 SSI Transmit Timing (1)......................................................................................1263
Figure 33.86 SSI Transmit Timing ...........................................................................................1263
Figure 33.87 SSI Receive Timing (1) .......................................................................................1263
Figure 33.88 SSI Receive Timing (2) .......................................................................................1263
Figure 33.89 Output Load Circuit.............................................................................................1265
Figure 33.90 Load Capacitance-Delay Time ............................................................................1266
Appendix
Figure E.1 Instruction Prefetch .................................................................................................1261
Figure F.1 Power-On and Power-Off Procedures .....................................................................1262
Rev. 1.0, 02/03, page xl of xlviii