SH7760 Datasheet, PDF (711/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

19.3.15 Transmit FIFO Data Count Register (ICTFDR)
ICTFDR is a 32-bit register that indicates the byte count stored in ICTXD. The lower 5 bits
indicates the number of transmit bytes in ICTXD. ICTFDR can always be read by the CPU.
H'0000 0000 indicates that ICTXD contains no transmit data, while H'0000 0010 indicates the it is
full of transmit data.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
T4 T3 T2 T1 T0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
19.4 Operation
19.4.1 Data and Clock Filters
These blocks filter out glitches on signals coming from the I²C bus. A glitch with a duration of up
to one clock cycle is rejected. (See the description of the clock control register for details of
internal clock). This is specified for the faster I²C bus rate (400 kHz) but does not violate the
slower I²C bus rate specification.
These blocks also perform resynchronization of bus signals to the internal clock.
19.4.2 Clock Generator
The clock generator has two functions. Firstly, it generates the SCL I²C bus clock under command
of the master or slave interface. Secondly, it controls the internal clock rate, used by filtering
blocks and the master and slave interfaces. This operates as a clock-enable signal to the registers
in the filter, master, and slave interfaces.
19.4.3 Master and Slave Interfaces
Master and slave interfaces run independently and in parallel. The master interface controls the
transmission of address and data on the I²C bus. The slave interface monitors the I²C bus and takes
part in transmissions if its programmed address is seen on the bus. Both interfaces communicate
with the control register and the status registers independently. Only one interrupt line comes from
the I²C bus interface module; the source could be either the master or the slave.
Rev. 1.0, 02/03, page 661 of 1294