SH7760 Datasheet, PDF (1043/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

28.1 Input/Output Pins
Table 28.1 shows the pin configuration for the H-UDI.
Table 28.1 Pin Configuration
Pin Name
Clock
Mode
Reset
Data Input
Data Output
Emulator
Abbreviation
TCK
TMS
TRST
TDI
TDO
ASEBRK/
BRKACK
I/O Function
When Not
in Use
Input
Functions as the serial clock input pin
Open*¹
prescribed in the JTAG standards. Data input
to the H-UDI via the TDI pin or data output via
the TDO pin is performed in sync with this
signal.
Input
Mode Select Input
Open*¹
Changing this signal in sync with a TCK signal
determines the significance of data input via
the TDI pin. Its protocol conforms to the JTAG
standards (IEEE standards 1149.1).
Input
H-UDI Reset Input
Connected
This signal is received asynchronously with a to ground
TCK signal. Asserting this signal low resets *²*³
the JTAG interface circuit. At power- on,
assert the TRST pin low for a given period,
whether or not JTAG is used. This differs from
the IEEE standards.
Input
Data Input
Entering this signal in sync with a TCK signal
will send data to the H-UDI circuit.
Open*¹
Output Data Output
Open
Reading this signal in sync with a TCK signal
will read out data from the H-UDI circuit.
Input/ Emulator Connection Only
Output
Open*¹
Rev. 1.0, 02/03, page 993 of 1294