SH7760 Datasheet, PDF (43/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Tables
Section 1 Overview
Table 1.1 Pin Configuration........................................................................................................12
Table 1.2 Pin Functions ..............................................................................................................21
Table 1.3 Pin Functions (1).........................................................................................................22
Table 1.3 Pin Functions (2).........................................................................................................23
Table 1.3 Pin Functions (3).........................................................................................................24
Table 1.4 Pin Functions ..............................................................................................................25
Section 2 Programming Model
Table 2.1 Initial Register Values.................................................................................................31
Section 3 Floating-Point Unit (FPU)
Table 3.1 Floating-Point Number Formats and Parameters ........................................................42
Table 3.2 Floating-Point Ranges.................................................................................................43
Table 3.3 Bit Allocation for FPU Exception Handling ...............................................................48
Section 4 Instruction Set
Table 4.1 Addressing Modes and Effective Addresses ...............................................................57
Table 4.2 Notation Used in Instruction List ................................................................................61
Table 4.3 Fixed-Point Transfer Instructions ...............................................................................62
Table 4.4 Arithmetic Operation Instructions...............................................................................63
Table 4.5 Logic Operation Instructions.......................................................................................65
Table 4.6 Shift Instructions .........................................................................................................66
Table 4.7 Branch Instructions .....................................................................................................67
Table 4.8 System Control Instructions........................................................................................68
Table 4.9 Floating-Point Single-Precision Instructions ..............................................................70
Table 4.10 Floating-Point Double-Precision Instructions .............................................................71
Table 4.11 Floating-Point Control Instructions.............................................................................71
Table 4.12 Floating-Point Graphics Acceleration Instructions .....................................................72
Section 5 Pipelining
Table 5.1 Instruction Groups.......................................................................................................80
Table 5.2 Parallel-Executability..................................................................................................83
Table 5.3 Execution Cycles ........................................................................................................90
Section 6 Memory Management Unit (MMU)
Table 6.1 Register Configuration (1) ........................................................................................108
Table 6.1 Register Configuration (2) ........................................................................................109
Section 7 Caches
Table 7.1 Cache Features (EMODE = 0) ..................................................................................137
Table 7.2 Cache Features (EMODE = 1) ..................................................................................137
Table 7.3 Store Queue Features ................................................................................................138
Rev. 1.0, 02/03, page xli of xlviii