SH7760 Datasheet, PDF (929/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name
15
SCICLK0
14
SCIRXD0
13
SCITXD0
12
SCICLK1
11
SCICTS1
10
SCIRTS1
9
SCIRXD1
8
SCITXD1
7
SCICLK2
6
SCICTS2
5
SCIRTS2
4
SCIRXD2
3
SCITXD2
2 to 0 —
Initial Value R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
All 0
R
Description
0: Sets SCIF0_CLK Hi-Z state to off
1: Sets SCIF0_CLK Hi-Z state to on
0: Sets SCIF0_RXD Hi-Z state to off
1: Sets SCIF0_RXD Hi-Z state to on
0: Sets SCIF0_TXD Hi-Z state to off
1: Sets SCIF0_TXD Hi-Z state to on
0: Sets SCIF1_CLK Hi-Z state to off
1: Sets SCIF1_CLK Hi-Z state to on
0: Sets SCIF1_CTS Hi-Z state to off
1: Sets SCIF1_CTS Hi-Z state to on
0: Sets SCIF1_RTS Hi-Z state to off
1: Sets SCIF1_RTS Hi-Z state to on
0: Sets SCIF1_RXD Hi-Z state to off
1: Sets SCIF1_RXD Hi-Z state to on
0: Sets SCIF1_TXD Hi-Z state to off
1: Sets SCIF1_TXD Hi-Z state to on
0: Sets SCIF2_CLK Hi-Z state to off
1: Sets SCIF2_CLK Hi-Z state to on
0: Sets SCIF2_CTS Hi-Z state to off
1: Sets SCIF2_CTS Hi-Z state to on
0: Sets SCIF2_RTS Hi-Z state to off
1: Sets SCIF2_RTS Hi-Z state to on
0: Sets SCIF2_RXD Hi-Z state to off
1: Sets SCIF2_RXD Hi-Z state to on
0: Sets SCIF2_TXD Hi-Z state to off
1: Sets SCIF2_TXD Hi-Z state to on
Reserved
These bits are always read as 0, and the write
value should always be 0.
24.2.37 Mode Select Register (MODSELR)
MODESELR is an 8-bit readable/writable register that individually sets the mode of pins MFI-D2
to MFI-D7 and SSI0_SCK. When MFI mode/LCD mode is used, modules should be selected in
IPSELR. However, when these pins are used as GPIOs, the settings in this register will be invalid.
Bit: 7
6
5
4
3
2
1
0
MOD MOD MOD MOD MOD MOD MOD
SELR7 SELR6 SELR5 SELR4 SELR3 SELR2 SELR1
-
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R
Rev. 1.0, 02/03, page 879 of 1294