SH7760 Datasheet, PDF (665/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name
Initial
Value R/W Description
1 WAIT_ER 0
R/W Wait Error
Indicates the wait timer error status.
0: Indicates that the interval between the start of two
successive characters has not exceeded the etu set by
SIWAIT.
[Clearing Conditions]
• On reset
• When 0 is written to WAIT_ER while its value is 1
1: Indicates that the interval between the start of two
successive characters has exceeded the etu set by
SIWAIT.
[Setting Conditions]
• In T = 0 mode, when the interval between the start of two
successive characters exceeds the etu (value of 60 x
SIWAIT: working wait time).
• In T = 1 mode, when the interval between the start of two
successive characters exceeds the etu (SIWAIT value:
Guardtime).
Notes: *1. Even if the RE bit in SISCR is cleared to 0, the
WAIT_ER flag is unaffected, and the previous
state is maintained.
*2. In T = 0 mode, changing the RE bit from 0 to 1
may not set the WAIT_ER bit, even if the setting
conditions for the WAIT_ER bit are satisfied. In
this condition, the WAIT_ER bit is set at the
timing of 60 × (SCWAIT + n) etu after the last
transmission or reception. n is a whole number
and it depends on the timing at which the RE bit
is set.
*3. In T = 0 mode, to avoid making the WAIT_ER bit
set at the timing of 60 × (SCWAIT + n) etu after
the last transmission or reception, the following
procedure should be followed: Change the
protocol bit (PB) in the smart card mode register
(SISCMR) from 0 to 1 and again change the PB
bit to 0.
In T = 1 mode, to avoid making the WAIT_ER bit
set at the timing of (SCWAIT) etu after the last
reception, the following procedure should be
followed:
Change the PB bit in SISCMR from 1 to 0 and
again change the PB bit to 1.
Rev. 1.0,02/03, page 615 of 1294