SH7760 Datasheet, PDF (642/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

If clock output mode is selected, the SCIF outputs eight synchronization clock pulses for each
data.
When the external clock is selected, data is output in synchronization with the input clock.
The serial transmit data is sent from the SCIF_TXD pin in the LSB-first order.
3. The SCIF checks the SCFTDR transmit data at the timing for sending the last bit. If data is
present, the data is transferred from SCFTDR to SCTSR, and then serial transmission of the
next frame is started. If there is no transmit data, the TEND flag in SCFSR is set to 1 after the
last bit is sent, and the transmit data pin (SCIF_TXD pin) retains the output state of the last bit.
4. After serial transmission ends, the SCIF_CLK pin is fixed high.
Figure 17.18 shows an example of the operation for transmission in synchronous mode.
Synchronization
clock
Serial data
LSB
Bit 0 Bit 1
MSB
Bit 7
Bit 0
Bit 1
Bit 6 Bit 7
TDFE
TEND
TXI
Data written to SCFTDR TXI interrupt
interrupt and TDFE flag cleared to 0 _request
request by TXI interrupt handler
One frame
Figure 17.18 Sample SCIF Transmission Operation in Synchronous Mode
Rev. 1.0, 02/03, page 592 of 1294