SH7760 Datasheet, PDF (1044/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Pin Name Abbreviation I/O Function
When Not
in Use
Emulator
AUDSYNC/
AUDCK/
AUDATA[3] to
AUDATA[0]
Output Emulator Connection
Open*⁴
When bit 13 of IPSELR in the PFC is set to 1,
signals are output to the following pins.
CAN0_TX/AUDATA[0]
CAN1_TX/AUDATA[1]
CAN0_RX/AUDATA[2]
CAN1_RX/AUDATA[3]
CAN0_NERR/AUDCK
CAN1_NERR/AUDSYNC
When bit 12 of IPSELR in the PFC is set to 1,
signals are output to the following pins.
ADTRG/AUDATA[0]
FWE/AUDATA[1]
FCDE/AUDATA[2]
FCE/AUDATA[3]
FOE/AUDCK
FSC/AUDSYNC
Notes: *1. This pin is pulled up in this LSI. Using external pull-up resistors will not affect the use of
interrupts or resets via the H-UDI or emulators on the board.
*2. Design the TRST pin so that it can retain low while the RESET pin is asserted low at a
power on reset and can control reset independently, to use interrupts or resets via the
H-UDI or emulators on the board.
*3. This pin should be connected to ground, the RESET, or another pin that operates in the
same manner as the RESET pin. However, note that connecting this pin to a ground pin
will cause the following problem. Since the TRST pin is pulled up within this LSI, a weak
current flows when the pin is externally connected to ground. The value of the current is
determined by a resistance of the pull-up MOS for the port pin. Although this current
does not affect the operation of this LSI, it consumes unnecessary power.
*4. Pull up these pins when not using them as emulator pins and they are not in the output
state.
The maximum frequency of a TCK (TMS, TDI, and TDO) signal is 20 MHz, or 2 MHz when
boundary scan function is used. Set the TCK clock or the CPG of this LSI so that the frequency of
TCK is lower than the frequency of the peripheral clock of this LSI.
Rev. 1.0, 02/03, page 994 of 1294