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SH7760 Datasheet, PDF (917/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine
interrupt source codes for the IRL and IRQ pins and the priority level of the GPIO interrupt, refer
to section 9, Interrupt Controller (INTC).
24.2.22 Port A Pull-Up Control Register (PAPUPR)
PAPUPR is an 8-bit readable/writable register that individually controls the pull-up for pins PTA7
to PTA2 corresponding to each bit in the register when the given pin is used by a peripheral
module. However, for the pins set to the GPIO in the PACR, the settings in this register will be
invalid.
Bit: 7
6
5
4
3
2
1
0
PA7 PA6 PA5 PA4 PA3 PA2 -
-
PUPR PUPR PUPR PUPR PUPR PUPR
Initial value: 1
1
1
1
1
1
0
0
R/W: R/W R/W R/W R/W R/W R/W R
R
Bit Bit Name
7 PA7PUPR
6 PA6PUPR
5 PA5PUPR
4 PA4PUPR
3 PA3PUPR
2 PA2PUPR
1, 0 —
n = 7 to 2
Initial Value R/W Description
1
R/W Sets individual pull-up control for given pins of Port A
1
R/W 0: PTAn pull-up off
1
R/W 1: PTAn pull-up on
1
R/W
1
R/W
1
R/W
All 0
R
Reserved
These bits are always read as 0, and the write value
should always be 0.
24.2.23 Port B Pull-Up Control Register (PBPUPR)
PBPUPR is an 8-bit readable/writable register that individually controls the pull-up for pins PTB7
to PTB1 corresponding to each bit in the register when the given pin is used by a peripheral
module. However, for the pins set to the GPIO in the PBCR, the settings in this register will be
invalid.
Bit: 7
6
5
4
3
2
1
0
PB7 PB6 PB5 PB4 PB3 PB2 PB1 -
PUPR PUPR PUPR PUPR PUPR PUPR PUPR
Initial value: 1
1
1
1
1
1
1
0
R/W: R/W R/W R/W R/W R/W R/W R/W R
Rev. 1.0, 02/03, page 867 of 1294