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| SH7760 Datasheet, PDF (1277/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine | |||
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CKIO
Bank
Tpr
Tpc
tAD
tAD
Row
Precharge-sel
H/L
Address
CSn
RD/WR
RAS
CASS
DQMn
D31-D0
(write)
BS
tCSD
tCSD
tRWD tRWD
tRASD tRASD
tCASD2
tCASD2
tDQMD
tDQMD
tWDD
tWDD
tBSD
CKE
DACKn
tDACD
tDACD
NOTES: IO : Dack device
SA : Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 33.35 Synchronous DRAM Bus Cycle: Precharge Command (TPC[2:0]=001)
Rev. 1.0, 02/03, page 1227 of 1294
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