 English |
|
|
|
|
|
|
|
| SH7760 Datasheet, PDF (379/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine | |||
| |||
| ◁ |
CKIO
A25âA5
A4âA0
CSn
RD/WR
RD
D31âD0
(read)
BS
T1 Tw Twe TB2 TB1 Tw TB2 TB1 Tw TB2 TB1 Tw T2
RDY
DACKn
(SA: IO â memory)
Note: For DACKn, an example is shown where CHCRn.AL (acknowledge level) = 0 for the DMAC.
Figure 10.34 Burst ROM Wait Access Timing
Rev. 1.0, 02/03, page 329 of 1294
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese