SH7760 Datasheet, PDF (638/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Serial data
SCIF_RXD
Start
bit
0 D0 D1 D2
Parity Stop
bit bit
D7 0/1 1
Start
bit
0
SCIF_RTS
Figure 17.14 Sample Operation Using Modem Control (SCIF_RTS)
(Only in Channels 1 and 2)
17.4.3 Operation in Synchronous Mode
Synchronous mode, in which data is transmitted or received in synchronization with clock pulses,
is suitable for fast serial communication.
Since the transmitter and receiver are independent units in the SCIF, full-duplex communication
can be achieved by sharing the clock. Both the transmitter and receiver have a 128-stage FIFO
buffer structure, so that data can be read or written during transmission or reception, enabling
continuous data transfer and reception.
Figure 17.15 shows the general format for synchronous communication.
*
Synchronization
clock
Serial data
One unit of transfer data (character or frame)
*
LSB
MSB
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Don’t care
Don’t care
Note: * High except in continuous transfer
Figure 17.15 Data Format in Synchronous Communication
In synchronous serial communication, data on the communication line is output from one fall of
the synchronization clock to the next fall. Data is guaranteed to be accurate at the start of the
synchronization clock.
In serial communication, each character is output starting with the LSB and ending with the MSB.
After the MSB is output, the communication line remains in the state of the last data.
In synchronous mode, the SCIF receives data in synchronization with the rise of the
synchronization clock.
Rev. 1.0, 02/03, page 588 of 1294