SH7760 Datasheet, PDF (613/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Bit
Bit Name Initial Value R/W Description
5
TDFE
1
R/W*¹ Transmit FIFO Data Empty
Indicates that data has been transferred from
SCFTDR to SCTSR, the number of data bytes in
SCFTDR has fallen to or below the transmit
trigger data number set by bits TTRG1 and
TTRG0 in SCFCR, and new transmit data can be
written to SCFTDR.
0: A number of transmit data bytes exceeding the
transmit trigger set number have been written to
SCFTDR
[Clearing conditions]
• When transmit data exceeding the transmit
trigger set number is written to SCFTDR after
reading TDFE = 1, and 0 is written to TDFE
• When transmit data exceeding the transmit
trigger set number is written to SCFTDR by
the DMAC
1: The number of transmit data bytes in SCFTDR
does not exceed the transmit trigger set
number
[Setting conditions]
• Power-on reset or manual reset
• When the number of SCFTDR transmit data
bytes falls to or below the transmit trigger set
number as the result of a transmit operation*³
Notes: *1. Only 0 can be written, to clear the flag.
*2. In 2-stop-bit mode, only the first stop bit is checked for a value of 1; the second stop bit
is not checked.
*3. As SCFTDR is a 128-byte FIFO register, the maximum number of bytes that can be
written when TDFE = 1 is 128 − (transmit trigger set number). Data written in excess of
this will be ignored.
The upper bits of SCFDR indicate the number of data bytes transmitted to SCFTDR.
Rev. 1.0, 02/03, page 563 of 1294