SH7760 Datasheet, PDF (1292/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

CKIO
DREQn
DRAKn
t_DRQH
t_DRQS
t_DRAKD
t_DRQH
t_DRQS
Figure 33.50 DREQ/DRAK Timing
33.3.6 TMU Module Signal Timing
Table 33.10 TMU Module Signal Timing
(V_DDQ= 3.0 to 3.6V, V_DD= 1.5V, T_a= −40 to 85°C, C_L= 30pF, PLL2 on)
Module Item
Symbol
TMU
Note:
Timer clock pulse width (High)
Timer clock pulse width (Low)
Timer clock rise time
Timer clock fall time
t_Pcyc : one Pck cycle time
t
TCLKWH
t_TCLKWL
t_TCLKr
t_TCLKf
Min.
4
4
—
—
Max.
—
—
0.8
0.8
Unit
t
Pcyc
t_Pcyc
t_Pcyc
t_Pcyc
Figure
33.51
33.51
33.51
33.51
Notes
TCLK
t_TCLKWH
t_TCLKWL
t_TCLKf
t_TCLKr
Figure 33.51 TCLK Input Timing
Rev. 1.0, 02/03, page 1242 of 1294