SH7760 Datasheet, PDF (1328/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Signal Name
Pin Name
Reset
Standby
Bus
I/O Power-on Manual Sleep Software Hardware Release
USB_DP*¹³
I/O O
I
I/O
I
O
I/O
USB_DM*¹³
I/O O
I
I/O
I
O
I/O
HAC_BIT_CLK1*¹¹
HAC_BIT_CLK1 I
PZ
I
I
Z
Z
I
PJ2
I/O PZ
I/O
I/O
Z/O
Z
I/O
DCK*¹¹
DCK
O
PZ
PZ/O
PZ/O PZ/O
Z
PZ/O
PJ1
O
PZ
O
O
O
Z
O
Legend: I: Input
O: Output
H: High level output
L: Low level output
Z: Hi-z state
PI: Input pulled up with a built-in pull-up resistance.
PZ: Output pulled up with a built-in pull-up resistance.
Notes: 1. Z (I) or O (refresh) according to the register contents (BCR1.HIZCNT).
2. Depends on the refresh operation.
3. Z (I) or H (retained) according to the register contents (BCR1.HIZMEM).
4. Output when the auto-refresh is selected.
5. Pulled up or not according to the register contents (BCR1.OPUP).
6. Pulled up or not according to the register contents (BCR1.DPUP).
7. Pulled up using the pull-up MOSs. However, the pull-up MOSs cannot be used to pull-
up the mode pins at a power-on reset. For this purpose, pull-up or pull-down outside the
LSI.
8. Z or O according to the register contents (STBCR2.STHZ).
9. Pulled up or not according to the PFC register settings (see section 24, Pin Function
Controller (PFC)). However, the PFC register settings are invalid in hardware standby
mode.
10. Hi-z or not according to the PFC register settings (see section 24, Pin Function
Controller (PFC)).
11. Pulled up or not, and the multiplexed functions for IP modules are selected by the PFC
register settings (see section 24, Pin Function Controller (PFC)). However, the PFC
register settings are invalid in hardware standby mode. For details of the I/O control for
the selected IP modules, see the corresponding section. Selection of the GPIO
functions and the I/O control of the GPIO are determined according to the GPIO register
settings (see section 24, Pin Function Controller (PFC)).
12. According to the ADC register settings. Hi-z at initialization.
13. Pull-down for USB pins while not used.
14. Only low level output since these pins are open-drain pins. Pulled up when the I²C is not
in use.
15. Depends on the refresh and DMAC operations.
16. Z or O according to the register contents (FRQCR.CKOEN).
Rev. 1.0, 02/03, page 1278 of 1294