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| SH7760 Datasheet, PDF (1263/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine | |||
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CKIO
A25-A5
A4-A0
CSn
RD/WR
RD
D31-D0
(read)
BS
T1 TB2 TB1 TB2 TB1 TB2 TB1 T2
tAD
tAD
tAD
tCSD
tRWD
tRSD
tRSD
tRDS
tBSD
tBSD
tRDH
tCSD
tRWD
tRSD
tRDS
tRDH
RDY
DACKn
(SA:IO memory)
DACKn
(DA)
tDACD
tDACD
tDACD
tDACD
tDACD
NOTES: IO : Dack device
SA : Single address DMA transfer
DA : Dual address DMA transfer
DACK set to active-high
Figure 33.21 Burst ROM Bus Cycle (No Wait)
Rev. 1.0, 02/03, page 1213 of 1294
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