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SH7760 Datasheet, PDF (552/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine
(c) Software standby → Manual reset
Oscillation stops
Reset
CKIO
RESET (High)
MRESET*1
STATUS Normal*2
Standby*3 Undefined
Reset*4
Normal*2
0–30 Bcyc*5
0–20 Bcyc*5
Notes: 1. When standby mode is exited by means of a manual reset, a WDT count is not
performed. Hold MRESET low for the PLL oscillation stabilization time.
2. Normal : LL (STATUS1 is low and STATUS0 is low)
3. Standby : LH (STATUS1 is low and STATUS0 is high)
4. Reset : HH (STATUS1 is high and STATUS0 is high)
5. Bcyc : Bus clock cycle
Figure 14.5 STATUS Output in Sequence of Software Standby → Manual Reset
(3) In Exit from Sleep Mode
(a) Sleep → Interrupt
Interrupt request
CKIO
STATUS
Normal*1
Sleep*2
Normal*1
Notes: 1. Normal : LL (STATUS1 is low and STATUS0 is low)
2. Sleep : HL (STATUS1 is high and STATUS0 is low)
Figure 14.6 STATUS Output in Sequence of Sleep → Interrupt
Rev. 1.0, 02/03, page 502 of 1294