SH7760 Datasheet, PDF (293/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

10.5.1 Bus Control Register 1 (BCR1)
BCR1 is a 32-bit readable/writable register that specifies the function, bus cycle status, etc., of
each area. Do not access off-chip memory space other than area 0 until register initialization is
complete.
Bit: 31 30 29 28
END _- A0M _-
IAN
PX
Initial value: 0/1 0 0/1 0
R/W: R
R
R
R
27 26 25 24 23
- DPUP - OPUP -
0
0
0
0
0
R R/W R R/W R
22 21 20 19 18 17 16
-
A1 A4 BREQ
MBC MBC EN
MEM DMA
MPX BST
0
0
0
0
0
0
0
R R/W R/W R/W R R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
HIZ HIZ A0 A0 A0 A5 A5 A5 A6 A6 A6 DRA DRA DRA
MEM CNT BST2 BST1 BST0 BST2 BST1 BST0 BST2 BST1 BST0 MTP2 MTP1 MTP0
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W RW R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R
0
A56
PCM
0
R/W
Bit
Initial
Bit
Name Value
31
ENDIAN 0/1
30

0
29
A0MPX 0/1
28, 27 
All 0
R/W
R
R
R
R
Description
Endian Flag
The value of the endian setting off-chip pin (MD5) is
sampled at a power-on reset by the RESET pin. This bit
determines the endian mode of all spaces.
0: Indicates that pin MD5 is low at a power-on reset and
big-endian mode is specified for this LSI.
1: Indicates that pin MD5 is high at a power-on reset and
little-endian mode is specified for this LSI.
Reserved
This bit is always read as 0. The write value should
always be 0.
Area 0 Memory Type
The value of the area 0 memory type setting off-chip pin
(MD6) is sampled at a power-on reset by the RESET pin.
This bit determines the memory type of area 0.
0: Indicates that pin MD6 is high and area 0 is specified
as SRAM interface
1: Indicates that pin MD6 is low, and area 0 is specified
as MPX interface
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.0, 02/03, page 243 of 1294