SH7760 Datasheet, PDF (1008/1345 Pages) Renesas Technology Corp – SuperHTM RISC engine

Input/output pins
MCCLK
MCCMD
MCDAT
CMDSTRT
(START)
OPCR
(DA TA EN)
(CMDOFF)
INTSTR0
(CMDI)
(CRPI)
(DTI)
(DRPI)
(DBSYI)
(FEI)
CSTR
(CWRE)
(BUSY)
(FIFO_EMPTY)
(DTBUSY)
(DTBUSY_TU)
CMD24(WRITE_SINGLE_BLOCK)
Command
Command
response
Command
transmission
started
Transfer clock
transmission
halted
Transfer clock
transmission resumed
Write data
Write data
Block data Block data
transmission transmission
suspended resumed
Writing data to FIFO
Busy
Single block write command execution sequence
(REQ)
Figure 26.16 Example of Command Sequence for Commands with Write Data
(Block Size > FIFO Size)
Rev. 1.0, 02/03, page 958 of 1294