PXR40RM Datasheet, PDF (997/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Table 27-5. EQADC Memory Map (continued)
Address
Offset¹
Register
Bits Access Reset Value Section/Page
0x00A0 EQADC_CFSSR0—EQADC CFIFO Status Snapshot
32
Register 0
0x00A4 EQADC_CFSSR1—EQADC CFIFO Status Snapshot
32
Register 1
0x00A8 Reserved
0x00AC EQADC_CFSR—EQADC CFIFO Status Register
32
0x00B0–0x Reserved
00CC
0x00D0 EQADC_REDLCCR—EQADC Red Line Client
32
Configuration Register
0x00D4–0x Reserved
00FC
0x0100–0x0 EQADC_CF0Rw—EQADC CFIFO0 Registers (w=0, .., 3) 32
10C
0x0110–0x0 EQADC_CF0ERw—EQADC CFIFO0 Extension
32
11C Registers (w=0, .., 3)
0x0120 Reserved
–0x013C
0x0140–0x0 EQADC_CF1Rw—EQADC CFIFO1 Registers (w=0, .., 3) 32
14C
0x0150–0x0 Reserved
17C
0x0180–0x0 EQADC_CF2Rw—EQADC CFIFO2 Registers (w=0, .., 3) 32
18C
0x0190–0x0 Reserved
1BC
0x01C0–0x EQADC_CF3Rw—EQADC CFIFO3 Registers (w=0, .., 3) 32
01CC
0x01D0–0x Reserved
01FC
0x0200–0x0 EQADC_CF4Rw—EQADC CFIFO4 Registers (w=0, .., 3) 32
20C
0x0210–0x0 Reserved
23C
0x0240–0x0 EQADC_CF5Rw—EQADC CFIFO5 Registers (w=0, .., 3) 32
24C
0x0250–0x0 Reserved
2FC
0x0300–0x0 EQADC_RF0Rw—EQADC RFIFO0 Registers (w=0, .., 3) 32
30C
0x0310–0x0 Reserved
33C
0x0340–0x0 EQADC_RF1Rw—EQADC RFIFO1 Registers (w=0, .., 3) 32
34C
0x0350–0x0 Reserved
37C
R 0x0000_7800 27.6.2.9/30
R 0x0000_7800
—
—
R 0x0000_0000 27.6.2.10/32
—
—
0x0000_0000 27.6.2.11/33
—
—
R 0x0000_0000 27.6.2.12/34
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.13/37
—
—
R 0x0000_0000 27.6.2.14/37
—
—
R 0x0000_0000 27.6.2.14/37
—
—
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
27-15