PXR40RM Datasheet, PDF (1130/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Decimation Filter
Table 28-6. DECFILT_x_MXCR Field Descriptions (continued)
Field
Description
28–29
30–31
SENSEL
Reserved
Integrator Enable Control Selection—The SENSEL field defines the integrator enabling mechanism. When the
integrator is enabled, filter outputs selected by the SISEL bit are added to the integration accumulator. When the
integrator is disabled, the integration accumulator remains unaltered on filter outputs. For more details see
Section 28.3.13.4, Integrator Enabling and Halting.
SENSEL[1:0]
Description
00
Integrator disabled, independently of the hardware enable control signal
01
Integrator enabled, independently of the hardware signal
10
Integrator enabled when signal is at logical 0
11
Integrator enabled when signal is at logical 1
28.2.2.4 Decimation Filter Module Extended Status Register (DECFILT_x_MXSR)
Address: DECFILT_x_BASE + 0x00C
0
R0
W
1
2
3
4
5
0 0000
Reset 0
0 0000
6
7
8
0
0
0
SDFC
0
0
0
Access: User read/write
9
10
11
12
13
14
15
0
0
0
0
0
0
0
SSEC SCEC
SSOVF
C
SCOVF
C
SVRC
0
0
0
0
0
0
0
R
W
Reset
16
17
18 19 20 21
22
23
24
25
26
27
28
29
30
31
0
0 0 0 0 0 0 SDF 0
0 SSE SCE 0 SSOVF SCOVF SVR
0
0 0000 0
0
0
0
0
0
0
0
0
0
Figure 28-5. Decimation Filter Extended Status Register (DECFILT_x_MXSR)
Field
0–6
7
SDFC
8–9
Table 28-7. DECFILT_x_MXSR Field Descriptions
Description
Reserved
Integrator Output Data Flag Clear bit—The SDFC bit clears the SDF Flag bit in the Status Register. This bit is
self negated, therefore it is always read as zero.
0 No action
1 Clears SDF
Reserved
28-16
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor