PXR40RM Datasheet, PDF (407/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Core (e200z7) Overview
Field
0–21
RPN
22–25
U0-U3
26–31
PERMIS
Table 13-9. MAS3 - RPN and Access Control
Comments, or Function when Set
Real page number [0:21]
Only bits that correspond to a page number are valid. Bits that represent
offsets within a page are ignored and should be zero.
User bits [0-3] for use by system software
Permission bits (UX, SX, UW, SW, UR, SR)
The MAS4 register is shown below.
0
0
0
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
SPR - 628; Read/ Write; Reset - Unaffected
Figure 13-11. MMU Assist Register 4 (MAS4)
Fields are defined below.
Table 13-10. MAS4 - Hardware Replacement Assist Configuration Register
Field
0–1
2–3
TLBSELD
4–13
14–15
TIDSELD
16–19
20–24
TSIZED
25
Comments, or Function when Set
Reserved¹
Default TLB selected
00 TLB0
01 TLB1
Reserved¹
Default PID# to load TID from
00 PID0
01 Reserved, do not use
10 Reserved, do not use
11 TIDZ (8’h00)) (Use all zeros, the globally shared value)
Reserved¹
Default TSIZE value
Reserved¹
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
13-19