PXR40RM Datasheet, PDF (1337/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
Message
TCODE Field #1
Field #2
Field #3 Field #4 Field #5
Min.
Size¹
Bits
Max.
Size²
Bits
Device ID Message
1 Fixed = 32
—
—
—
—
38
38
1 _{Minimum information size. The actual number of bits transmitted depends on the number of MDO pins}
2 _{Maximum information size. The actual number of bits transmitted depends on the number of MDO pins}
Figure 31-6. Message Field Sizes
The double edges in Figure 31-6 indicate the starts and ends of messages. Fields without shaded areas
between them are grouped into super-fields and can be transmitted together without end-of-packet
indications between them.
31.7.2.2.1 Rules of Messages
The rules of messages include the following:
• A variable-sized field within a message must end on a port boundary. (Port boundaries depend on
the number of MDO pins active with the current reset configuration.)
• A variable-sized field can start within a port boundary only when following a fixed-length field.
• Super-fields must end on a port boundary.
• When a variable-length field is sized such that it does not end on a port boundary, it is necessary
to extend and zero fill the remaining bits after the highest order bit so that it can end on a port
boundary.
• Multiple fixed-length packets can start and/or end on a single clock.
• When any packet follows a variable-length packet, it must start on a port boundary.
• The field containing the TCODE number is always transferred out first, followed by subsequent
fields of information.
• Within a field, the lowest significant bits are shifted out first. Figure 31-7 shows the transmission
sequence of a message that is made up of a TCODE followed by three fields.
4
3
2
1
FIELD #3
FIELD #2
FIELD #1
TCODE
MSB
6 bits LSB
Figure 31-7. Transmission Sequence of Messages
31.7.2.3 IEEE 1149.1-2001 (JTAG) TAP
The NPC uses the IEEE 1149.1-2001 TAP for accessing registers. Each of the individual Nexus modules
on the device implements a TAP controller for accessing its registers as well. TAP signals include TCK,
TDI, TMS, and TDO. Detailed information about the TAP controller state machine can be found in
Section 32.4.3, TAP Controller State Machine.
The IEEE 1149.1-2001 specification can be ordered for further detail on electrical and pin protocol
compliance requirements.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-21