PXR40RM Datasheet, PDF (824/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexCAN Module
24.3.4 Register Descriptions
The FlexCAN registers are described in this section in ascending address order.
24.3.4.1 Module Configuration Register (FLEXCAN_x_MCR)
This register defines global system configurations, such as the module operation mode (e.g., low power)
and maximum message buffer configuration. Most of the fields in this register can be accessed at any time,
except the MAXMB field, which should only be changed while the module is in Freeze Mode.
Base + 0x0000
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
W
NOT_
MDIS FRZ FEN HALT RDY
0
FRZ_
SOFT
_RST
ACK
SUPV
0
MDI-
WRN _SACK
_EN
0
DOZE ^SRX
_DIS
MBF
EN
RESET: 0 1 0 1 1 0 0 1 1 0 0 1 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
W
0
0
LPRI
O_EN
AEN
0
0
IDAM
00
MAXMB
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
Figure 24-5. Module Configuration Register (FLEXCAN_x_MCR)
Field
0
MDIS
1
FRZ
2
FEN
Table 24-8. FLEXCAN_x_MCR Field Descriptions
Description
Module Disable
This bit controls whether FlexCAN is enabled or not. When disabled, FlexCAN shuts down the clocks to
the CAN Protocol Interface and Message Buffer Management sub-modules. This is the only bit in
FLEXCAN_x_MCR not affected by soft reset. See Section 24.4.9.2, Module Disable Mode, for more
information.
0 Enable the FlexCAN module
1 Disable the FlexCAN module
Freeze Enable
The FRZ bit specifies the FlexCAN behavior when the HALT bit in the FLEXCAN_x_MCR Register is set
or when Debug Mode is requested at MCU level. When FRZ is asserted, FlexCAN is enabled to enter
Freeze Mode. Negation of this bit field causes FlexCAN to exit from Freeze Mode.
0 Not enabled to enter Freeze Mode
1 Enabled to enter Freeze Mode
FIFO Enable
This bit controls whether the FIFO feature is enabled or not. When FEN is set, MBs 0 to 7 cannot be used
for normal reception and transmission because the corresponding memory region (0x80-0xFF) is used
by the FIFO engine. See Section 24.3.3, Rx FIFO Structure and Section 24.4.7, Rx FIFO, for more
information.
0 FIFO not enabled
1 FIFO enabled
24-14
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor