PXR40RM Datasheet, PDF (1389/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Field
14–15
BWR2
16
BWT2
17–31
Nexus Development Interface (NDI)
Table 31-43. BWC2 Field Description (continued)
Description
Breakpoint/watchpoint #2 register compare
00 No register compare (same as BWC1[31:30] = 2’b00)
01 Invalid value
10 Compare with BWA2 value
11 Invalid value
Breakpoint/watchpoint #2 Type
0 Invalid value
1 Watchpoint #2 on data accesses
Reserved, read as 0.
31.17.2.8 Breakpoint/Watchpoint Address Registers 1 and 2 (BWA1 and BWA2)
The breakpoint/watchpoint address registers are compared with bus addresses to generate internal
watchpoints.
Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
BREAKPOINT / WATCHPOINT ADDRESS
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 31-51. Breakpoint / Watchpoint Address Registers (BWA1, BWA2)
31.17.2.9 Unimplemented Registers
Unimplemented registers are those with client select and index value combinations other than those listed
in Table 31-36. For unimplemented registers, the NXDM and NXFR modules drives TDO to zero during
the “SHIFT-DR” state. It also transmits an error message with the invalid access opcode encoding.
31.17.2.10 Programming Considerations (RESET)
If Nexus3 register configuration is to occur during system reset (as opposed to debug mode), all NXDM
configuration should be completed between the negation of JCOMP and system reset de-assertion, after
the JTAG DID register has been read by the tool.
31.17.2.11 IEEE 1149.1 (JTAG) Test Access Port
The NXDM and NXFR modules uses the IEEE 1149.1 TAP controller for accessing Nexus resources. The
JTAG signals themselves are shared by all TAP controllers on the device. Refer to Chapter 32, IEEE
1149.1 Test Access Port Controller (JTAGC), for more information on the JTAG interface.
The NXDM and NXFR modules implements a 4-bit instruction register (IR). The valid instructions and
method for register access are outlined in Section 31.7.2.3, IEEE 1149.1-2001 (JTAG) TAP.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-73