PXR40RM Datasheet, PDF (931/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Serial Communication Interface (eSCI)
DMA
CTRL
BUS
CLK
CPU
IRQ
DMA
CTRL
INTERNAL DATA BUS
RX DMA
CHANNEL
BAUD RATE
GENERATOR
RCLK
LIN PE
16
TCLK
RECEIVE
DATA REGISTER
RECEIVE
SHIFT REGISTER
RECEIVE
CONTROL
WAKEUP
CONTROL
FRAME FORMAT
CONTROL
TRANSMIT
CONTROL
POLARITY
CONTROL
LOOP
CONTROL
INTERRUPT
GENERATION
TRANSMIT
SHIFT REGISTER
TX DMA
CHANNEL
TRANSMIT
DATA REGISTER
INTERNAL DATA BUS
Figure 26-1. eSCI Block Diagram
26.1.5 Features
The eSCI block includes these distinctive features:
• Full-duplex operation
• Standard mark/space non-return-to-zero (NRZ) format
• 13-bit baud rate selection
• Programmable frame, payload, and character format
• Support of 2 stop bits in receiver path
• Hardware parity generation and checking
— Programmable even or odd parity
• Programmable polarity of RXD pin
• Separately enabled transmitter and receiver
• Two receiver wake up methods:
— Idle line wake-up
— Address mark wake-up
• Interrupt-driven operation with eight flags:
— Transmitter empty
— Transmission complete
— Receiver full
RXD
TXD
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
26-3