PXR40RM Datasheet, PDF (1310/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

External Bus Interface (EBI)
Table 30-21. Misalignment Cases Supported by a 64 bit AMBA EBI (external bus) (continued)
No.¹ PS²
Program Size
and byte offset
D_ADD[29:31]³
D_WE[0:3]⁴
10
0
11
Word @0x7,0xF
10
(2 AHB transfers)
1
11
12
0
-
Doubleword
12
@0x4,0xC
(2 AHB transfers)
1
-
111⁵
000
111⁵
000
010
100⁷
000
100⁷
110
000
010
1110
0001
1011
0011
0111
0000
0000
0011
0011
0011
0011
13
0
000
100
-
Doubleword
000
@0x2,0xA
010
13
(2 AHB transfers)
100
1
110
1100
0000
0011
0011
0011
0011
-
14
0
15
Doubleword
14
@0x6,0xE
(2 AHB transfers)
1
15
000
110⁶
000
100
110⁶
000
010
100
0011
1100
0000
0011
0011
0011
0011
0011
1 _{Misaligned case number, from Table 30-20.}
2 _{Port size; 0=32 bits, 1=16 bits.}
3 _{External D_ADD pins, not necessarily the address on internal master}
AHB bus.
4 _{External D_WE pins. Note that these pins have negative polarity,}
opposite of the internal byte strobes in Table 30-20.
5 _{Treated as 1-byte access.}
6 _{Treated as 2-byte access.}
7 _{Treated as 4-byte access.}
30.4.2.12 Address Data Multiplexing
Address/Data multiplexing enables the design of a system with reduced pin count. In such a system,
multiplexed address/data functions (on D_ADD_DAT pins) are used, instead of having separate address
and data pins. Compared to the normal EBI specification (e.g. 24 address pins+32 data pins), only 32 data
30-48
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor