PXR40RM Datasheet, PDF (881/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
Address: DSPI_BASE + 0x30
0
1
2
3
R
00
W
Access: R/W
4
5
6
7
8
9 10 11
12
13
14
15
0
00 0 0
0
Reset 0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
16 17 18 19
20
21 22
23 24 25 26 27
28
29
30
31
R0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
W
Reset 0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
Figure 25-7. DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
Table 25-15. DSPI_RSER Field Descriptions
Field
Description
0
TCF_RE
Transmission Complete Request Enable. The TCF_RE bit enables TCF flag in the DSPI_SR to
generate an interrupt request.
0 TCF interrupt requests are disabled
1 TCF interrupt requests are enabled
1–2
Reserved, should be cleared.
3
EOQF_RE
DSPI Finished Request Enable. The EOQF_RE bit enables the EOQF flag in the DSPI_SR to
generate an interrupt request.
0 EOQF interrupt requests are disabled
1 EOQF interrupt requests are enabled
4
TFUF_RE
Transmit FIFO Underflow Request Enable. The TFUF_RE bit enables the TFUF flag in the DSPI_SR
to generate an interrupt request.
0 TFUF interrupt requests are disabled
1 TFUF interrupt requests are enabled
5
Reserved, should be cleared.
6
TFFF_RE
Transmit FIFO Fill Request Enable. The TFFF_RE bit enables the TFFF flag in the DSPI_SR to
generate a request. The TFFF_DIRS bit selects between generating an interrupt request or a DMA
requests.
0 TFFF interrupt requests or DMA requests are disabled
1 TFFF interrupt requests or DMA requests are enabled
7
Transmit FIFO Fill DMA or Interrupt Request Select. The TFFF_DIRS bit selects between generating
TFFF_DIRS a DMA request or an interrupt request. When the TFFF flag bit in the DSPI_SR is set, and the
TFFF_RE bit in the DSPI_RSER register is set, this bit selects between generating an interrupt
request or a DMA request.
0 Interrupt request will be generated
1 DMA request will be generated
8–11 Reserved, should be cleared.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
25-21