PXR40RM Datasheet, PDF (202/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

System Integration Unit (SIU)
7.3.1.9 IRQ Rising-Edge Event Enable Register (SIU_IREER)
The SIU_IREER enables rising edge-triggered events on IRQ[n]. Rising- and falling-edge events are
enabled by setting the bits in SIU_IREER and SIU_IFEER.
SIU_IREER bits used for NMI events are write once and another write will be allowed after a reset.
Address: SIU_BASE + 0x0028
Access: R/W
0
12345 6
7
8
9 10 11 12 13 14 15
R _{IREE_} 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0
W ^NMI8
Reset 0
00000 0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
W
IREE
15
IREE
14
IREE
13
IREE
12
IREE
11
IREE
10
IREE9
IREE8
IREE7
IREE6
IREE5
IREE4
IREE3
IREE2
IREE1
IREE0
Reset 0
00000 0
0
0
0
0
0
0
0
0
0
Figure 7-10. IRQ Rising-Edge Event Enable Register (SIU_IREER)
The following table describes the fields in the IRQ rising-edge event enable register:
Table 7-16. SIU_IREER Bit Field Descriptions
Field
Function
0
IREE_
NMI8
1–15
16–0
IREEn
IRQ rising-edge event enable for NMI from external NMI pin.
0 Rising-edge event is disabled.
1 Rising-edge event is enabled.
Reserved
IRQ rising-edge event enable n. Enables rising-edge-triggered events on the corresponding IRQ[n] pin.
0 Rising-edge event is disabled.
1 Rising-edge event is enabled.
7-20
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor