PXR40RM Datasheet, PDF (382/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Flash Memory Array and Control
The first write after a program is initiated determines the page address to be programmed. Program may
be initiated with the 0 to 1 transition of the FLASH_x_MCR[PGM] bit or by clearing the
FLASH_x_MCR[EHV] bit at the end of a previous program. This first write is referred to as an interlock
write. If the program is not an erase-suspended program, the interlock write determines if the shadow or
normal array space will be programmed and causes FLASH_x_MCR[PEAS] to be set/cleared.
NOTE
Only the first write after a program is initiated does the interlock write and
all later writes only look at bits 2 and 3 of the address so be careful that all
writes after the interlock write are for that same 128 bit section.
In the case of an erase-suspended program, the value in FLASH_x_MCR[PEAS], is retained from the
erase.
An interlock write must be performed before setting FLASH_x_MCR[EHV]. The user may terminate a
program sequence by clearing FLASH_x_MCR[PGM] prior to setting FLASH_x_MCR[EHV].
If multiple writes are done to the same location the data for the last write is used in programming.
While FLASH_x_MCR[DONE] is low, FLASH_x_MCR[EHV] is high, and FLASH_x_MCR[PSUS] is
low, the user may clear FLASH_x_MCR[EHV], resulting in a program abort. A program abort forces the
module to step 8 of the program sequence. An aborted program will result in FLASH_x_MCR[PEG] being
set low, indicating a failed operation. The data space being operated on before the abort will contain
indeterminate data. The user may not abort a program sequence while in program suspend.
NOTE
Aborting a program operation will leave the flash core addresses being
programmed in an indeterminate data state. This may be recovered by
executing an erase on the affected blocks.
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PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor