PXR40RM Datasheet, PDF (33/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

• Chapter 25, Deserial Serial Peripheral Interface (DSPI), describes the serial peripheral interface
(SPI) block, which provides a synchronous serial interface for communication between the PXR40
and external devices.
• Chapter 26, Enhanced Serial Communication Interface (eSCI), describes the eSCI interface, which
allows asynchronous serial communications with off-chip peripheral devices.
• Chapter 27, Enhanced Queued Analog-to-Digital Converter (EQADC),
• Chapter 28, Decimation Filter, describes the 12 on-chip modules that contain a
multiply-accumulate (MAC) unit capable of implementing a 16-bit, 4th order IIR or 8th order FIR
filter.
• Chapter 29, Enhanced Time Processing Unit (eTPU2), describes the co-processor designed for
timing control.
• Chapter 30, External Bus Interface (EBI), describes the module that handles the transfer of
information between the internal buses and the memories or peripherals in the external address
space.
• Chapter 31, Nexus Development Interface (NDI), describes the Nexus Development Interface
(NDI) block, which provides real-time development support capabilities for the PXR40 in
compliance with the IEEE-ISTO 5001-2003 standard.
• Chapter 32, IEEE 1149.1 Test Access Port Controller (JTAGC), describes configuration and
operation of the Joint Test Action Group (JTAG) controller implementation. It describes those
items required by the IEEE 1149.1 standard and provides additional information specific to the
device. For internal details and sample applications, see the IEEE 1149.1 document.
• Chapter 33, Device Performance Optimization, describes how to improve the overall level of
performance provided by the device.
• Chapter 34, Temperature Sensor, describes the on-board sensor that monitors device temperature.
• Appendix A, Revision History of this Document, describes the revision history of this document.
Suggested reading
This section lists additional reading that provides background for the information in this manual as well as
general information about PowerPC architecture.
General information
Useful information about the PowerPC architecture and computer architecture in general:
• Programming Environments Manual for 32-Bit Implementations of the PowerPC™ Architecture
(MPCFPE32B)
• Using Microprocessors and Microcomputers: The Motorola Family, William C. Wray, Ross
Bannatyne, Joseph D. Greenfield
• Computer Architecture: A Quantitative Approach, Second Edition, by John L. Hennessy and David
A. Patterson.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
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