PXR40RM Datasheet, PDF (705/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

FlexRay Communication Controller (FLEXRAY)
For each enabled channel the message buffer search may identify multiple matching message buffers.
Among all matching message buffers the message buffers with highest priority according to Table 22-112
for the static segment and according to Table 22-113 for the dynamic segment are selected.
Table 22-112. Message Buffer Search Priority (static segment)
Priority MTD LCKS CMT CCFM¹
Description
Transition
(highest) 0 1
0
1
1 transmit buffer, matches cycle count, not locked and committed
MA
1
-
0
1 transmit buffer, matches cycle count, not committed
SA
1
1
1
-
1 transmit buffer, matches cycle count, locked
SA
21
-
-
- transmit buffer
SA
30
0
n/a
1 receive buffer, matches cycle count, not locked
SB
(lowest) 4 0
1
n/a
1 receive buffer, matches cycle count, locked
SB
1 _{Cycle Counter Filter Match, see Section 22.6.7.1, Message Buffer Cycle Counter Filtering.}
Table 22-113. Message Buffer Search Priority (dynamic segment)
Priority MTD LCKS CMT CCFM¹
Description
Transition
(highest) 0 1
0
1
1 transmit buffer, matches cycle count, not locked and committed
MA
10
0
n/a
1 receive buffer, matches cycle count, not locked
SB
(lowest) 2 0
1
n/a
1 receive buffer, matches cycle count, locked
SB
1 _{Cycle Counter Filter Match, see Section 22.6.7.1, Message Buffer Cycle Counter Filtering.}
If there are multiple message buffer with highest priority, the message buffer with the lowest message
buffer number is selected. All message buffer which have the highest priority must have a consistent
channel assignment as specified in Section 22.6.7.2, Message Buffer Channel Assignment Consistency.
Depending on the message buffer channel assignment the same message buffer can be found for both
channel A and channel B. In this case, this message buffer is used as described in Section 22.6.3.1,
Individual Message Buffers.
22.6.7.1 Message Buffer Cycle Counter Filtering
The message buffer cycle counter filter is a value-mask filter defined by the CCFE, CCFMSK, and
CCFVAL fields in the Message Buffer Cycle Counter Filter Registers (MBCCFRn). This filter determines
a set of communication cycles in which the message buffer is considered for message reception or message
transmission. If the cycle counter filter is disabled, i.e. CCFE = 0, this set of cycles consists of all
communication cycles.
If the cycle counter filter of a message buffer does not match a certain communication cycle number, this
message buffer is not considered for message transmission or reception in that communication cycle. In
case of a transmit message buffer assigned to a slot in the static segment, though, this buffer is added to
the matching message buffers to indicate the slot assignment and to trigger the null frame transmission.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
22-121