PXR40RM Datasheet, PDF (1397/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
31.17.5.4.2 DTM Queueing
NXDM and NXFR implements a programmable depth queue for queuing all messages. Messages that
enter the queue are transmitted via the auxiliary pins in the order in which they are queued.
NOTE
If multiple trace messages must be queued at the same time, watchpoint
messages have the highest priority (WPM  DTM).
31.17.5.4.3 Relative Addressing
The relative address feature is compliant with IEEE-ISTO 5001-2011 and is designed to reduce the number
of bits transmitted for addresses of data trace messages. Relative addressing is the same as described for
the NZ7C3 in Section 31.14.2, Relative Addressing.
31.17.5.4.4 Data Trace Windowing
Data write/read messages are enabled via the RWT1(2) field in the data trace control register (DTC) for
each DTM channel. Data trace windowing is achieved via the address range defined by the DTEA and
DTSA registers and by the RC1(2) field in the DTC. All eDMA or FlexRay initiated read/write accesses
that fall inside or outside these address ranges, as programmed, are candidates to be traced.
31.17.5.4.5 System Bus Cycle Special Cases
Table 31-50. System Bus Cycle Special Cases
Special Case
System bus cycle aborted (DABORT asserted)
System bus cycle with data error
System bus cycle completed without error
System bus cycle is an instruction fetch
Action
Cycle ignored
Data Trace Message discarded
Cycle captured and transmitted
Cycle ignored
31.17.5.5 Data Trace Timing Diagrams (Eight MDO configuration)
Data trace timing for the NXDM and NXFR is the same as for the NZ7C3. Refer to Section 31.14.6.4,
Data Trace Timing Diagrams (Eight MDO Configuration).
31.17.6 Watchpoint Support
The NXDM and NXFR module provides watchpoint messaging via the auxiliary pins, as defined by
IEEE-ISTO 5001-2003.
Watchpoint messages can be generated using the NXDM and NXFR defined internal watchpoints.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
31-81