PXR40RM Datasheet, PDF (543/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Field
24
SAE
25
SOE
26
DAE
27
DOE
28
NCE
29
SGE
30
SBE
31
DBE
Enhanced Direct Memory Access Controller (eDMA)
Table 21-5. EDMA_x_ESR Field Descriptions (continued)
Description
Source Address Error.
0 No source address configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.SADDR field,
indicating EDMA_x_TCD.SADDR is inconsistent with EDMA_x_TCD.SSIZE.
Source Offset Error.
0 No source offset configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.SOFF field, indicating
EDMA_x_TCD.SOFF is inconsistent with EDMA_x_TCD.SSIZE.
Destination Address Error.
0 No destination address configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.DADDR field,
indicating EDMA_x_TCD.DADDR is inconsistent with EDMA_x_TCD.DSIZE.
Destination Offset Error.
0 No destination offset configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.DOFF field, indicating
EDMA_x_TCD.DOFF is inconsistent with EDMA_x_TCD.DSIZE.
NBYTES/CITER Configuration Error.
0 No NBYTES/CITER configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.NBYTES or
EDMA_x_TCD.CITER fields, indicating the following conditions exist:
• EDMA_x_TCD.NBYTES is not a multiple of EDMA_x_TCD.SSIZE and EDMA_x_TCD.DSIZE, or
• EDMA_x_TCD.CITER is equal to zero, or
• EDMA_x_TCD.CITER.E_LINK is not equal to EDMA_x_TCD.BITER.E_LINK.
Scatter-Gather Configuration Error.
0 No scatter-gather configuration error.
1 The last recorded error was a configuration error detected in the EDMA_x_TCD.DLAST_SGA field,
indicating EDMA_x_TCD.DLAST_SGA is not on a 32-byte boundary. This field is checked at the
beginning of a scatter-gather operation after major loop completion if EDMA_x_TCD.E_SG is enabled.
Source Bus Error.
0 No source bus error.
1 The last recorded error was a bus error on a source read.
Destination Bus Error.
0 No destination bus error.
1 The last recorded error was a bus error on a destination write.
21.3.2.3 eDMA Enable Request Registers (EDMA_A_ERQRH, EDMA_x_ERQRL)
NOTE
Any reference to EDMA_A_[register_name] should be ignored when using
eDMA_B. That register does not exist in eDMA_B. Registers that exist in
both eDMA_A and eDMA_B are indicated with a register name of format
EDMA_x_[register_name].
The EDMA_A_ERQRH and EDMA_x_ERQRL provide a bit map for the 32 (or 64 for eDMA_A)
channels to enable the request signal for each channel. EDMA_A_ERQRH supports channels 63–32,
while EDMA_x_ERQRL covers channels 31–0.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
21-19