PXR40RM Datasheet, PDF (1354/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Nexus Development Interface (NDI)
After the ACCESS_AUX_TAP_ONCE instruction has been loaded, the JTAG/OnCE port allows
tool/target communications with all Nexus3 registers according to the register map in Table 31-23.
Reading/writing of a NZ7C3 register then requires two (2) passes through the data-scan (DR) path of the
JTAG state machine (see 31.14.10).
1. The first pass through the DR selects the NZ7C3 register to be accessed by providing an index (see
Table 31-23), and the direction (read/write). This is achieved by loading an 8-bit value into the
JTAG data register (DR). This register has the following format:
(7-bits)
(1-bit)
Nexus register index
R/W
RESET Value: 0x00
Nexus Register Index:
Read/Write (R/W):
Selected from values in Table 31-23
0 Read
1 Write
2. The second pass through the DR then shifts the data in or out of the JTAG port, lsb first.
a) During a read access, data is latched from the selected Nexus register when the JTAG state
machine passes through the capture-DR state.
b) During a write access, data is latched into the selected Nexus register when the JTAG state
machine passes through the update-DR state.
31.12 Ownership Trace
This section details the ownership trace features of the NZ7C3 module.
Ownership trace provides a macroscopic view, such as task flow reconstruction, when debugging software
written in a high level (or object-oriented) language. It offers the highest level of abstraction for tracking
operating system software execution. This is especially useful when the developer is not interested in
debugging at lower levels.
31.12.1 Ownership Trace Messaging (OTM)
Ownership trace information is messaged via the auxiliary port using an ownership trace message (OTM).
The e200z7 processor contains a Power Architecture Book E defined process ID register within the CPU.
The process ID register is updated by the operating system software to provide task/process ID
information. The contents of this register are replicated on the pins of the processor and connected to
Nexus. The process ID register value can be accessed using the mfspr/mtspr instructions. Please see the
e200z7 PowerPC^TM Core Reference Manual for more details on the process ID register.
The only condition that causes an ownership trace message occurs when the OTR register is updated or
process ID register by the e200z7 processor, the data is latched within Nexus, and is messaged out via the
auxiliary port, allowing development tools to trace ownership flow.
31-38
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor