PXR40RM Datasheet, PDF (1302/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

External Bus Interface (EBI)
0
OP0
OP1
OP2
31
OP3
32-bit
OP0
OP1
OP2
OP3
16-bit
OP0
OP1
Byte
OP2
OP3
Figure 30-31. Internal Operand Representation
Figure 30-32 shows the device connections on the D_ADD_DAT[0:31] bus.
0
OP0
OP1
OP2
31
OP3
Interface Output
Register
D_ADD_DAT[0:7]
[8:15]
[16:23]
[24:31]
OP0
OP1
OP2
OP3
32-bit Port Size
OP0
OP2
OP1
OP3
16-bit Port Size
Figure 30-32. Interface to Different Port Size Devices
Table 30-17 lists the bytes required on the data bus for read cycles. The bytes indicated as ‘-’ are not
required during that read cycle.
Table 30-17. Data Bus Requirements for Read Cycles
Transfer
Size
Address
A30 A31
D0:D7
32-Bit Port Size
D8:D15 D16:D23
D24:D31
16-Bit Port Size¹
D0:D7²
D8:D15³
Byte
16-bit
32-bit
0 0 OP0
01
—
10
—
11
—
0 0 OP0
10
—
0 0 OP0
—
OP1
—
—
OP1
—
OP1
—
—
OP2
—
—
OP2
OP2
—
—
—
OP3
—
OP3
OP3
OP0
—
—
OP1
OP2
—
—
OP3
OP0
OP1
OP2
OP3
OP0 or OP2 ⁴ OP1 or OP3
30-40
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor