PXR40RM Datasheet, PDF (227/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

System Integration Unit (SIU)
Table 7-26. SIU_DISR Bit Field Descriptions (continued)
Field
Description
10–11
SSSELB
12–13
SCKSELB
14–15
TRIGSELB
16–17
SINSELC
18–19
SSSELC
20–21
SCKSELC
22–23
TRIGSELC
24–25
SINSELD
DSPI B slave select input select. Specifies the source of the DSPI B slave select
input.
00 PCSB[0]_PCSD[2]_GPIO[105] pin
01 PCSA[0] (master)
10 PCSC[0] (master)
11 PCSD[0] (master)
DSPI B clock input select. Specifies the source of the DSPI B clock input.
00 SCKB_GPIO[102] pin
01 SCKA (master)
10 SCKC (master)
11 SCKD (master)
DSPI B trigger input select. Specifies the source of the DSPI B trigger input for
master or slave mode.
00 Invalid value
01 PCSA[4]
10 PCSC[4]
11 PCSD[4]
DSPI C data input select. Specifies the source of the DSPI C data input.
00 PCSB[3]_SINC_GPIO[108] pin
01 SOUTA
10 SOUTB
11 SOUTD
DSPI C slave select input select. Specifies the source of the DSPI C slave select
input.
00 PCSB[5]_PCSC[0]_GPIO[110] pin
01 PCSA[0] (master)
10 PCSB[0] (master)
11 PCSD[0] (master)
DSPI C clock input select. Specifies the source of the DSPI C clock input when in
slave mode.
00 PCSB[4]_SCKC_GPIO[109] pin
01 SCKA (master)
10 SCKB (master)
11 SCKD (master)
DSPI C trigger input select. Specifies the source of the DSPI C trigger input for
master or slave mode.
00 Invalid value
01 PCSA[4]
10 PCSB[4]
11 PCSD[4]
DSPI D data input select. Specifies the source of the DSPI D data input.
00 PCSA[3]_GPIO[99] pin
01 SOUTA
10 SOUTB
11 SOUTC
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
7-45