PXR40RM Datasheet, PDF (926/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
Push TX FIFO Register
TX FIFO Base
-
-
Entry A (first in)
Entry B
Entry C
Entry D (last in)
-
-
Transmit Next
Data Pointer
Shift Register
SOUT
+1
TX FIFO Counter
-1
Figure 25-42. TX FIFO Pointers and Counter
25.5.4.1 Address Calculation for the First-in Entry and Last-in Entry in the TX
FIFO
The memory address of the first-in entry in the TX FIFO is computed by the following equation:
First-in Entry Address = TX FIFO Base + 4  TXNXTPTR
Eqn. 25-7
The memory address of the last-in entry in the TX FIFO is computed by the following equation:
Last-in Entry address = TX FIFO Base + 4  modulo TX FIFO depthTXCTR + TXNXTPTR – 1
TX FIFO Base - Base address of TX FIFO
TXCTR - TX FIFO Counter
TXNXTPTR - Transmit Next Pointer
TX FIFO Depth - Transmit FIFO depth, implementation specific
Eqn. 25-8
25.5.4.2 Address Calculation for the First-in Entry and Last-in Entry in the RX
FIFO
The memory address of the first-in entry in the RX FIFO is computed by the following equation:
First-in Entry Address = RX FIFO Base + 4  POPNXTPTR
Eqn. 25-9
The memory address of the last-in entry in the RX FIFO is computed by the following equation:
Last-in Entry address = RX FIFO Base + 4  modulo RX FIFO depthRXCTR + POPNXTPTR – 1
RX FIFO Base - Base address of RX FIFO
Eqn. 25-10
25-66
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor